I received my M.Sc. and my Ph.D. in Electrical and Computer Engineering from the University Bretagne Sud, France, in 2010 and 2013 respectively. In 2012 I spent six months as an invited researcher at the Ruhr-University of Bochum, Germany. From 2013 to 2014, I was a Postdoctoral at LIRMM, Montpellier, France. I was involved in the European Mont-Blanc project. I am currently associate professor at University Bretagne Sud, France. My research interests include hardware security, reconfigurable and self-adaptive multiprocessor architectures.
Open M.SC. intership positions
- Implementation of Countermeasure Techniques for Cache-based Timing Side-Channel Attacks in Multi- & many-core systems
- Implementation of Cache-based Timing Side-Channel Attacks in Multi- & many-core systems